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| Small Outline, 5 Lead, Low Input Current, High Gain Optocouplers Technical Data HCPL-M700 HCPL-M701 Features * Surface Mountable * Very Small, Low Profile JEDEC Registered Package Outline * Compatible with Infrared Vapor Phase Reflow and Wave Soldering Processes * High Current Transfer Ratio - 2000% * Low Input Current Capability - 0.5 mA * TTL Compatible Output VOL = 0.1 V * Guaranteed ac and dc Performance Over Temperature: 0C to 70C * High Output Current 60 mA * Recognized under the Component Program of U.L. (File No. E55361) for Dielectric Withstand Proof Test Voltage of 3750 Vac, 1 Minute * Lead Free Option "-000E" Description These small outline, low input current, high gain optocouplers are single channel devices in a five lead miniature footprint. They are electrically equivalent to the following Agilent optocouplers: SO-5 Package HCPL-M700 HCPL-M701 Standard DIP 6N138 6N139 SO-8 Package HCPL-0700 HCPL-0701 The SO-5 JEDEC registered (MO155) package outline does not require "through holes" in a PCB. This package occupies approximately one-fourth the footprint area of the standard dual-in-line package. The lead profile is designed to be compatible with standard surface mount processes. These high gain series optocouplers use a Light Emitting Diode and an integrated high gain photodetector to provide extremely high current transfer ratio between input and output. Separate pins for the photodiode and output stage results in TTL compatible saturation voltages and high speed operation. Where desired the VCC and VO terminals may be tied together to achieve conventional photodarlington operation. CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. 2 The HCPL-M701 is for use in CMOS, LSTTL or other low power applications. A 400% minimum current transfer ratio is guaranteed over a 0-70C operating range for only 0.5 mA of LED current. The HCPL-M700 is designed for use mainly in TTL applications. Current Transfer Ratio is 300% minimum over 0-70C for an LED current of 1.6 mA [1 TTL Unit Load (U.L.)]. A 300% CTR enables operation with 1 U.L. out with a 2.2 k pull-up resistor. Selection for lower input currents down to 250 A is available upon request. Applications * Ground Isolate Most Logic Families - TTL/TTL, CMOS/ TTL, CMOS/CMOS, LSTTL/ TTL, CMOS/LSTTL * Low Input Current Line Receiver * EIA RS232C Line Receiver * Telephone Ring Detector * ac Line Voltage Status Indicator - Low Input Power Dissipation * Low Power Systems Ground Isolation Outline Drawing (JEDEC MO-155) ANODE 1 4.4 0.1 (0.173 0.004) 6 VCC MXXX XXX 7.0 0.2 (0.276 0.008) CATHODE 3 5 VOUT 4 GND 0.4 0.05 (0.016 0.002) 3.6 0.1* (0.142 0.004) 0.102 0.102 (0.004 0.004) 0.15 0.025 (0.006 0.001) 7 MAX. 1.27 BSC (0.050) 0.71 MIN. (0.028) MAX. LEAD COPLANARITY = 0.102 (0.004) DIMENSIONS IN MILLIMETERS (INCHES) * MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006) NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. 2.5 0.1 (0.098 0.004) Land Pattern Recommendation 4.4 (0.17) Schematic 6 VCC ICC + IF ANODE 1 VF CATHODE - 3 IO 5 VO 2.5 (0.10) 1.3 (0.05) 2.0 (0.080) 8.27 (0.325) 0.64 (0.025) 4 GND 3 Absolute Maximum Ratings (No Derating Required up to 85C) Storage Temperature ................................................. -55C to +125C Operating Temperature ............................................... -40C to +85C Average Input Current - IF ........................................................ 20 mA Peak Input Current - IF .............................................................. 40 mA (50% duty cycle, 1 ms pulse width) Peak Transient Input Current - IF .............................................. 1.0 A (1 s pulse width, 300 pps) Reverse Input Voltage - VR .............................................................. 5 V Input Power Dissipation ........................................................... 35 mW Output Current - IO (Pin 5) ........................................................ 60 mA Supply and Output Voltage - VCC (Pin 6-4),VO (Pin 5-4) HCPL-M700 ................................................................... -0.5 V to 7 V HCPL-M701 ................................................................. -0.5 V to 18 V Output Power Dissipation ....................................................... 100 mW Infrared and Vapor Phase Reflow Temperature .................. see below Solder Reflow Thermal Profile 300 PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 245C PEAK TEMP. 240C PEAK TEMP. 230C 2.5C 0.5C/SEC. 160C 150C 140C 3C + 1C/-0.5C 30 SEC. 30 SEC. SOLDERING TIME 200C TEMPERATURE (C) 200 100 PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 0 50 100 150 200 250 TIME (SECONDS) Recommended Pb-Free IR Profile tp Tp TL TEMPERATURE 260 +0/-5 C 217 C RAMP-DOWN 6 C/SEC. MAX. TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 20-40 SEC. RAMP-UP 3 C/SEC. MAX. Tsmax 150 - 200 C Tsmin ts PREHEAT 60 to 180 SEC. 25 t 25 C to PEAK TIME tL 60 to 150 SEC. NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 C, Tsmin = 150 C Insulation Related Specifications Parameter Symbol Min. External Air Gap L(IO1) (Clearance) Min. External Tracking Path L(IO2) (Creepage) Min. Internal Plastic Gap (Clearance) Tracking Resistance CTI Isolation Group (per DIN VDE 0109) Value 5 5 0.08 175 IIIa Units mm mm mm V Conditions Measured from input terminals to output terminals Measured from input terminals to output terminals Through insulation distance conductor to conductor DIN IEC 112/VDE 0303 Part 1 Material Group DIN VDE 0109 4 Electrical Specifications Over recommended temperature (TA = 0C to 70C) unless otherwise specified. (See note 6.) Parameter Current Transfer Ratio Symbol Device Min. Typ.* Max. Units HCPLCTR M701 400 500 M700 Logic Low Output Voltage VOL M701 300 2000 1600 1600 0.1 0.1 0.2 M700 Logic High Output IOH M701 M700 Logic Low Supply Current Logic High Supply Current Input Forward Voltage Input Reverse Breakdown Voltage Temperature Coefficient of Forward Voltage Input Capacitance InputOutput Insulation Resistance (InputOutput) Capacitance (InputOutput) ICCL 0.1 0.05 0.1 0.4 3500 2600 2600 0.4 0.4 0.4 0.4 100 250 1.5 mA A V % Test Conditions IF = 0.5 mA, VO = 0.4 V, VCC = 4.5 V IF = 1.6 mA, V = 0.4 V, VCC = 4.5 V IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V IF = 1.6 mA, IO = 8 mA, VCC = 4.5 V IF = 5 mA, IO = 15 mA, VCC = 4.5 V IF = 12 mA, IO = 24 mA, VCC = 4.5 V IF = 1.6 mA, IO = 24 mA, VCC = 4.5 V IF = 0 mA, VO = VCC = 18 V IF = 0 mA, VO = VCC = 7 V IF = 1.6 mA, VO = Open, VCC = 18 V IF = 0 mA, VO = Open, VCC = 18 V TA = 25C IF = 1.6 mA IR = 10 A 4 1 Fig. 2, 3 Note 1 ICCH 0.01 10 A VF 1.4 1.7 1.75 V BVR 5 VF/TA -1.8 mV/C IF = 1.6 mA CIN VISO 3750 60 pF VRMS f = 1 MHz, VF = 0 RH 50%, t = 1 min, TA = 25C VI-O = 500 VDC 2, 3 RI-O 1012 2 CI-O 0.6 pF f = 1 MHz 2 *All typicals at TA = 25C, VCC = 5 V. 5 Switching Specifications Over recommended temperature (TA = 0C to 70C), VCC = 5 V, unless otherwise specified. Parameter Propagation Delay Time to Logic Low at Output Sym- Device bol HCPL- Min. tPHL M701 Typ.* Max. Unit 25 75 100 0.5 2 3 M700 5 20 25 Propagation Delay Time to Logic High at Output tPLH M701 10 60 90 1 10 15 M700 10 35 50 Common |CMH| Mode Transient Immunity at Logic High Output Common |CML| Mode Transient Immunity at Logic Low Output *All typicals at TA = 25C. Notes: 1. dc CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100. 2. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together. 3. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second (leakage detection current limit, II-O 5 A). 4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 5. In applications where dV/dt may exceed 50,000 V/s (such as static discharge) a series resistor, RCC, should be included to protect the detector IC from destructively high surge currents. The recommended value is RCC = 220 . 6. Use of a 0.1 F bypass capacitor connected between pins 4 and 6 is recommended. Test Conditions TA = 25C IF = 0.5 mA, RL = 4.7 k IF = 12 mA, RL = 270 IF = 1.6 mA, RL = 2.2 k IF = 0.5 mA, RL = 4.7 k IF = 12 mA, RL = 270 IF = 1.6 mA, RL = 2.2 k Fig. Note 5, 6, 7 s TA = 25C TA = 25C TA = 25C 5, 6, 7 TA = 25C TA = 25C 1,000 10,000 V/s IF = 0 mA RL = 2.2 k |VCM| = 10 Vp-p 8 4, 5 1,000 10,000 V/s IF = 1.6 mA RL = 2.2 k |VCM| = 10 Vp-p 8 4, 5 6 CTR - CURRENT TRANSFER RATIO - % 5.0 mA IO - OUTPUT CURRENT - mA 3.0 mA 2.5 mA 2.0 mA 1.5 mA 70 C 1600 1200 800 400 0 0.1 VCC = 5.0 V VO = 0.4 V IO - OUTPUT CURRENT - mA 50 4.5 mA 4.0 mA 3.5 mA 2000 0 C 25 C 100 10 TA = 70C 1.0 TA = 25C 0.1 TA = 0C 0.01 0.01 25 1.0 mA 0.5 mA 0 0 TA = 25C VCC = 5.0 V 1.0 VO - OUTPUT VOLTAGE - V 2.0 1.0 10 0.1 1 10 IF - FORWARD CURRENT - mA IF - INPUT DIODE FORWARD CURRENT - mA Figure 1. dc Transfer Characteristics. Figure 2. Current Transfer Ratio vs. Forward Current. Figure 3. Output Current vs. Input Diode Forward Current. 1000 tp - PROPAGATION DELAY - s IF - FORWARD CURRENT - mA 100 10 1.0 0.1 0.01 0.001 1.1 IF + VF - TA = 25C 26 24 RL = 2.2 k I = 1.6 mA 22 F 1/f = 50 s 20 18 16 14 12 10 8 6 4 2 0 100.0 TA = 25C tf TIME - s tPLH tr 10.0 (SEE FIGURE 7 FOR TEST CIRCUIT) IF ADJUSTED FOR VOL = 2 V 1.0 0.1 1.0 10 tPHL 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - C 1.2 1.3 1.4 1.5 1.6 VF - FORWARD VOLTAGE - V RL - LOAD RESISTANCE - k Figure 4. Input Diode Forward Current vs. Forward Voltage. Figure 5. Propagation Delay vs. Temperature. Figure 6. Non-Saturated Rise and Fall Times vs. Load Resistance. 7 IF 0 VO (SATURATED RESPONSE) 1.5 V 5V PULSE GEN. ZO = 50 tr = 5 ns IF 1 6 RL 5 0.1F 3 RM 4 +5 V 10% DUTY CYCLE 1/f 100 s 1.5 V VOL IF MONITOR VO CL = 15 pF* tPHL tPLH 5V * INCLUDES PROBE AND FIXTURE CAPACITANCE VO (NONSATURATED RESPONSE) tf 90% 10% 90% 10% tr Figure 7. Switching Test Circuit. tr, tf = 16 ns VCM 0V tr 10 V 10% 90% 90% 10% IF B 1 A tf 5 5V VFF 3 4 6 RCC (SEE NOTE 5) +5 V 220 RL VO 0.1F VO SWITCH AT A: IF = 0 mA VO SWITCH AT B: IF = 1.6 mA VOL + VCM - PULSE GEN. Figure 8. Test Circuit for Transient Immunity and Typical Waveforms. www.agilent.com/semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152 (Domestic/International), or 0120-61-1280 (Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright (c) 2004 Agilent Technologies, Inc. Obsoletes 5989-0796EN December 28, 2004 5989-2110EN |
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